1. Field of the Invention
The invention described herein is most directly related to the field of heat transfer. More specifically, the invention is directed towards thermal management systems for transferring thermal energy across a boundary that includes one or more localized regions of elevated heat flux.
2. Description of the Prior Art
Present trends toward greater miniaturization of integrated circuits (IC) have provided motivation for innovative on-chip thermal management systems, in that smaller ICs have associated therewith corresponding increases in transistor densities leading to higher circuit current densities and corresponding increases in the heat flux associated therewith. Adding to modern thermal management challenges are developments in integrated circuits of mixed circuit architecture, wherein the power requirements of one or more sub-circuits is dramatically greater than the power requirements of surrounding circuits. For example, high power logic and low power memory have been integrated together in known microprocessors, resulting thereby in localized high power regions, commonly referred to as “hot-spots”. Such a condition is depicted in FIG. 1, wherein the various shadings represent the heat flux emanating from that region. As is shown in the Figure, a localized region of elevated flux is illustrated at 130, which indicates the location of a hot-spot. In the illustrative IC application, the localized region of elevated flux may be a hot-spot located in the area 130 on a die 120. Consistent with traditional thermal management practice, circuit die 120 may be thermally coupled to a heat spreader 110, which is itself thermally coupled to a heat sink 100.
It is expected that the heat flux emanating from hot-spots in the next generation of microprocessors may exceed 1,000 W/cm2, six times more than the average heat flux taken over the circuit die on which the hot-spot resides, with expected hot-spot temperatures to exceed by 30° C. the average die temperature. The inability for a CMOS “macrocell” to shed this excess heat from the high-heat flux hot-spot may result in a decrease in the operational speed thereof by some 10%-15%. As such, the performance of the entire chip is severely compromised and such microprocessors may experience an accelerated failure rate. In this light, it is to be noted that the traditional passive thermal management systems of the prior art are inadequate to the task of absorbing the heat of hot-spots of the anticipated technology.
Certain conventional thermal management systems, such as that shown in FIG. 2A, have sought to reduce the global temperature of an entire circuit die. In the Figure, which may be a packaging configuration commonly referred to as a “flip-chip”, a thermoelectric cooler 220 is thermally coupled to a circuit die 210 through a layer of thermal grease 215. The circuit die 210 may be electrically coupled to a substrate 205, which may be shared with other circuits not shown. The thermoelectric device 220 may be in thermal contact with a heat sink 225 for dissipating the thermal energy of the cooler 220. As shown in FIG. 2B, which illustrates the configuration of FIG. 2A in simplified form, the thermoelectric device 220 is in full contact with the entire circuit die 210. Thus, to reduce the temperature of hot-spot 230 to acceptable levels, the entire circuit die 210 is also cooled to the temperature of the device 220. The inefficiency of such conventional thermal management systems as applied to the hot-spot cooling problem is readily observed by the skilled artisan and motivation towards the design of more aggressive thermal solutions for managing systems that include localized regions of elevated flux is readily apparent.